|
|
 |
| |
|
Intel Home > IDF Global Site > PRC IDF Site > Beijing > Technical Training Sessions |
|
Intel Developer Forum |
|
| April 18-19 |
| Beijing International Convention Center |
Hotline: 800-990-6688 |
| Mayl 23-24 |
| Shenzhen Wuzhou Guest House |
E-mail: IDF@9500.CN |
|
| |
Technical Training Sessions |
| |
Power-Optimized Platforms Building Upon Intel Multi-core Architecture
| Track Abstract : |
As users look to get more out of their computers, continued increases in realizable compute capability per watt will be critical to meet these growing user needs. Come learn about Intel's multi-core architectures and details of Intel® Core™ Microarchitecture. |
| |
|
| Target Audiences : |
This track is designed for R&D managers, developers/designers, product marketers of desktop OEM/ODM and/or the audiences showing high interest in learning Intel desktop platform technologies and trends. |
| |
|
| Session Guides: |
★
★★
★★★
|
Introductory: A Starting Point Class
Intermediate: For Attendees With A Base Knowledge of the Topic
Advanced: Assumes Mastery of the Fundemental Principles |
|
| |
|
|
Date |
Time&Session ID |
Session Content |
April 18 |
13:30-14:20
BDTS001 |
Intel Multi-core Architecture and Implementations ★★ ( Download Session Foils )
Speaker introduction : Victor Lap-Kong Lee，Technical Marketing Engineer of Platform Application Engineering，Digital Enterprise Group，Intel Corporation |
What you will get from this session:
• Describe the physical implementations of Intel's multi-core processors on the 2005 and 2006 Intel platforms
• Explain the technical and performance differences between Dual/Multi-Core and Hyper Threading Technology
• Describe the software compatibility, optimizations and performance of Intel’s multi-core processors
• Insight into the differences between shared and independent cache architectures
• A discussion of bus traffic behaviour between HyperThreading
|
|
|
14:30-15:20
BDTS002 |
Main Memory Interaction with Dual Core, Graphics, Audio, and Power ★★ ( Download Session Foils )
Speaker introduction : Charles Chang，Supplier Manager，Technology Manufacturing Group，Intel Corporation |
What you will get from this session:
• Understanding of Intel's Main Memory Roadmap
• Importance of main memory with dual core, audio, graphics, power and OS
• New interconnect for servers and why you should care – FB-DIMM |
|
|
15:30-16:20
16:30-17:20
BDTS003 |
Intel Multi-core Architecture and Implementations ★★ ( Download Session Foils )
Speaker introduction : Victor Lap-Kong Lee，Technical Marketing Engineer of Platform Application Engineering，Digital Enterprise Group，Intel Corporation |
What you will get from this session:
• Describe the physical implementations of Intel's multi-core processors on the 2005 and 2006 Intel platforms
• Explain the technical and performance differences between Dual/Multi-Core and Hyper Threading Technology
• Describe the software compatibility, optimizations and performance of Intel's multi-core processors
• Insight into the differences between shared and independent cache architectures
• A discussion of bus traffic behaviour between HyperThreading |
|
|
|
| |
|
| * Intel (China) Co., Ltd. reserves all rights to explain the above terms. |
|
|
