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Intel Home > IDF Global Site > PRC IDF Site > Beijing |
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Intel Developer Forum |
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| April 18-19 |
| Beijing International Convention Center |
| Mayl 23-24 |
| Shenzhen Wuzhou Guest House |
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| Energy-Efficient Performance |
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The need for performance has evolved into drive for energy-efficient performance advances across our architecture, silicon, platforms, and software to help you create new uses, build new markets, and leap into the future. |
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At the Intel Developer Forum, we will reveal how we are delivering the benefits of energy-efficient performance with the latest computing architecture, silicon, software, and platform innovations from Intel, to enable you to drive your trajectory of technology innovation.
The following tracks and sessions will give you insight into Intel’s energy-efficient performance leadership. Make sure you do not miss out on these exciting topics:
Forum Keynote
Intel Technology Directions
Sean Maloney
Executive Vice President
General Manager, Mobility Group
INTEL CORPORATION
Time: 09:10-09:55, April 18, 2006
Venue: #1 Conference Room, 2nd Floor, BICC
Join Executive Vice President Sean Maloney for a technology tour de force on the key challenges facing the industry and how Intel is responding with multifaceted platform solutions – from semiconductors through software. Sean will highlight Intel’s process technology advances for 65nm, its next-generation microarchitecture that delivers a common, power-optimized computing foundation and a range of innovations to fully unleash the capabilities of multi-core, energy-efficient platforms.
Technology Insight
Intel® Core™ microarchitecture
Ofri Wechsler
Intel Fellow, Mobility Group
Director, Mobility Microprocessor Architecture
INTEL CORPORATION
Time: 11:05-11:45, April 19, 2006
Venue: #1 Conference Room, 2nd Floor, BICC
Two Intel Fellows will provide a deeper technical insight into the elements of Intel® Core™ microarchitecture. They will address how this new microarchitecture will technically enable a new generation of multi-core processors. This new generation of products will accelerate the proliferation of advanced computing capability into mainstream markets, and make the extreme computing high-end even more ultra-charged. They will provide examples of solutions enabled by Intel® Core™ microarchitecture
Sessions
Detailed time and venue, please see Track/session Agenda.
Architecture Innovation at Technology & Research
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- BTRS003 - Tera-scale Computing Research Program
- BTRS002 - Tera-Scale Computing: Unlocking Parallelism with Transactional Memory
- BMPS004 - Secure Mobile Systems
- BSFS002 - Leading innovation in wireless platforms with 3rd Generation Intel XScale® technology
Building Upon Intel® Core™ Microarchitecture
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- BDTS001 - Intel Multi-core Architecture and Implementations
- BDTS002&3 - Intel® Core™ Microarchitecture
- BSWS004 - How to use Intel Software compile and optimize Application on multi-core
- BSRS002 - Intel® Xeon® Processor Architecture: Design Performance and Efficiency
- BSGS002 - Accelerating Enterprise Storage Products with Next Generation Intel® Xeon® Processor-based Platforms
Panels
- Intel® Core™ Microarchitecture
Time: 11:50-12:40, April 19, 2006
Venue: #1 Conference Room, 2nd Floor, BICC
Chalk Talk
- Intel® Xeon® Processor Platform Technologies
Time: 16:30-17:20, April 18, 2006
Venue: Room 10, 3rd Floor, BICC
Face to Face with the Expert
- Future Mutli-Core Technology & Tera-scale Computing Research Program
Time: 17:30-18:30, April 18, 2006
Venue: Cafe, 2nd Floor, BICC
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| * Intel (China) Co., Ltd. reserves all rights to explain the above terms. |
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