Jim Brayton
Director, Enterprise Microprocessor Group
Design Manager, Nehalem Family CPU Development
Intel Corporation
Jim Brayton is the Project and Design Manager of the 45 nm Nehalem CPU in Hillsboro, Oregon. He has been leading the Nehalem product team from its initial architectural specification to its implementation and early silicon manufacturing. He is currently driving production readiness of Nehalem-based products in desktop, mobile and server configurations.
Prior to his current role, Brayton was the design manager for the first Intel® Pentium® 4 Processor product.
Brayton joined Intel in 1987 in Santa Clara as a design engineer on the Intel i486™ microprocessor, and later moved to develop key internal Design Automation tools as part of Intel's Design Technology group. In 1991, he joined the design team working on the Intel® Pentium® Pro processor, where he had a leading role in the development of Intel's new front-side bus architecture.
Brayton is the recipient of an Intel Achievement Award in 1989 for his role in the development of Intel's first RTL to Layout Synthesis system. He holds seven U.S. patents on bus microarchitecture and implementation.
Brayton graduated from Yale University in 1987 with a bachelor's degree in electrical engineering. |
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